`timescale 1ns/1ns
module encoder_83(
   input      [7:0]       I   ,
   input                  EI  ,
   
   output wire [2:0]      Y   ,
   output wire            GS  ,
   output wire            EO    
);
assign Y[2] = EI & (I[7] | I[6] | I[5] | I[4]);
assign Y[1] = EI & (I[7] | I[6] | ~I[5]&~I[4]&I[3] | ~I[5]&~I[4]&I[2]);
assign Y[0] = EI & (I[7] | ~I[6]&I[5] | ~I[6]&~I[4]&I[3] | ~I[6]&~I[4]&~I[2]&I[1]);

assign EO = EI&~I[7]&~I[6]&~I[5]&~I[4]&~I[3]&~I[2]&~I[1]&~I[0];

assign GS = EI&(I[7] | I[6] | I[5] | I[4] | I[3] | I[2] | I[1] | I[0]);
//assign GS = EI&(| I);
         
endmodule

module encoder_164(
   input      [15:0]      A   ,
   input                  EI  ,
   
   output wire [3:0]      L   ,
   output wire            GS  ,
   output wire            EO    
);

wire GS_1;
wire GS_2;
wire EO_1;

wire [2:0]L_1;
wire [2:0]L_2;
encoder_83 encoder_83_1(A[15:8],EI,L_1,GS_1,EO_1);
encoder_83 encoder_83_2(A[7:0],EO_1,L_2,GS_2,EO);
assign L[3]=GS_1;
assign L[2]=L_1[2]|L_2[2];
assign L[1]=L_1[1]|L_2[1];
assign L[0]=L_1[0]|L_2[0];
assign GS=GS_1|GS_2;

endmodule